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Keysight Introduces First PCI Express 6.0 Protocol Validation Tools

Keysight Introduces First PCI Express 6.0 Protocol Validation Tools
  • Expands PCI Express 6.0 architecture solution portfolio with new Protocol Analyzer and Exerciser to enable advanced PCI Express 6.0 protocol and Compute Express Link validation

  • Provides high-speed analysis up to 64 GT/s (PAM4) reducing the risk, cost, and time of PCI Express 6.0 technology silicon, endpoint, and root port prototyping and verification

  • Offers cable-free protocol analysis in a streamlined form factor that speeds testing and accelerates time-to-market

Keysight Technologies, introduces the first PCI Express (PCIe) 6.0 protocol validation tools. The cable-free Protocol Analyzer and Protocol Exerciser enable semiconductor, computer, and peripheral makers to perform complete silicon chip, root complex, and endpoint system verification in a real-time development environment.

The PCIe 6.0 specification is a new high-speed serial interface standard released by the PCI-SIG supporting the higher data traffic and bandwidth requirements of data centers. With the standard enabling new designs for servers, endpoint devices, switches, storage devices, and compute engines at speeds up to 64 gigatransfers per second (GT/s), equipment and device companies need protocol test solutions to validate PCIe 6.0 technology designs and ensure interoperability with other PCIe 6.0 specification compliant designs.

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Keysight meets the need of design engineers with the first PCIe 6.0 Protocol Analyzer and PCIe 6.0 Protocol Exerciser. These cable-free solutions provide testing versatility and enable faster, more confident testing of PCIe 6.0 technology designs.

The new Keysight protocol PCIe 6.0 architecture solutions offer:

  • Analysis of the data link / transaction layer of PCIe 6.0 technology designs
  • Support for all PCIe technology speeds – 2.5 GT/s, 5.0 GT/s, 8 GT/s, 16 GT/s, 32GT/s, and 64GT/s (PAM4) – and lane widths from x1 to x16
  • Emulation of root complex and endpoint devices when validating PCIe and Compute Express Link (CXL) technology designs
  • Debugging support with PCIe 6.0 technology and CXL 1.1 / 2.0 protocol visualization and analysis tools
  • Cable-free protocol analysis in a streamlined Card Electromechanical (CEM) form factor
  • Complete PCIe 6.0 standard test solution for the entire design cycle

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Jim Pappas, Director of Technology Initiatives Intel, said: “PCI Express 6.0-based I/O technology is expected to deliver a breakthrough performance in high-performance I/O interfaces. It also enables additional innovations including accelerator interconnects like Compute Express Link and on-chip communications such as Universal Chiplet Interconnect Express. PCIe 6.0 capable protocol analyzer and exerciser test equipment from companies including Keysight Technologies are critical to accelerating the development, deployment, and dissemination of high-performance I/O technologies on future Intel platforms and throughout the industry.”

Al Yanes, Chairman of the PCI-SIG, said: “The PCI-SIG is pleased to see PCIe 6.0 technology test tools start to become available to its members from member companies such as Keysight Technologies. We appreciate Keysight’s continued efforts to support PCIe technology and the time, effort and expense Keysight along with other test vendors put into new tool development to allow our members to support the new advances in the PCI Express specification.”

Dr. Joachim Peerlings, Vice President of Network and Data Center Solutions at Keysight, said: “In the race to advance artificial intelligence applications, physical layer and protocol validation of devices including networking interface cards, graphics processing units, and accelerators is key. With the revolutionary PCI Express 6.0 Protocol Analyzer and Exerciser, Keysight complements the portfolio of physical layer high-speed I/O and Ethernet physical and protocol solutions to enable the industry to test designs end-to-end.”

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