Radical New Methodology Delivers Unprecedented Insights, Ease-of-Use, and Rapid Analysis to Significantly Improve IC Design Quality and Time-to-Market
Diakopto announced a new EDA software platform, tool and methodology developed from the ground up to address the increasing impact of integrated circuit (IC) layout parasitics on design performance, precision, power, robustness, and reliability.
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The migration to more advanced technology nodes has led to the exponential growth in the magnitude, impact, and number of parasitic elements in modern ICs. This explosive increase in the size of post-layout netlists has slowed down SPICE and other conventional simulations to a crawling halt. Moreover, debugging the root causes of IC design problems has become extraordinarily difficult, tedious and time-consuming. The novel ParagonX solution is orders of magnitude faster and offers deep insight to help users quickly find the proverbial needle in a haystack – the few critical parasitic elements (out of thousands, millions, or billions) that are responsible for bottlenecks, choke points and weak areas. This reduces parasitics-related IC debugging and optimization time from days or weeks to minutes or hours, which is especially valuable during the tapeout phase.
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ParagonX has been adopted by over 30 industry-leading companies, including:
– One of the world’s largest cloud and software providers
– One of the industry’s largest consumer electronics and semiconductor manufacturing corporations
– Four of the top six fabless semiconductor companies
– Multiple Tier One networking and computing original equipment manufacturers (OEMs)
– More than three-quarters (or the overwhelming majority) of leading companies designing high-speed SerDes
– A global market leader in CMOS image sensors
ParagonX is being used to analyze and improve a broad spectrum of designs, including high-speed interconnects, RF, high-precision analog, data converters, low-power IoT, custom digital, memories, clocks, image sensors, ESD networks, power management, and many others – implemented in technologies ranging from 0.35um down to 3nm.
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“The ever-increasing demand for higher density, faster speed and greater precision of integrated circuits, coupled with continued migration to more advanced nodes have redefined the role of parasitics in IC design. A new methodology and new breed of insightful, intuitive tools that treat parasitics as a first-order design parameter are needed to help semiconductor companies more effectively adapt to this new reality where interconnect parasitics are more important than transistors, and when the layout is now the circuit,” said Maxim Ershov, Diakopto co-founder, CEO and CTO. “We are excited to see ParagonX emerging as the solution-of-choice for so many Tier One companies and to see our methodology used on numerous successful tapeouts, including the latest technology nodes.”
Another differentiating feature of the ParagonX software is its unparalleled ease-of-use. It offers a unique out-of-the-box experience that enables novice users to get started with minimal training. The tool does not require any complicated setup, configuration, CAD support, or foundry qualification. In addition, it offers extensive versatility because it is applicable to a broad range of IC design styles, design applications, and design problems. This highly intuitive and versatile methodology enables rapid adoption by new users and design teams.
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