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Synopsys Extends Verification Hardware Market Leadership with Breakthrough Emulation Performance

Synopsys Extends Verification Hardware Market Leadership with Breakthrough Emulation Performance

Delivers Next-Generation Solution Enabling 10 MHz Performance, Power-Aware Emulation, and System-Level Debug

Synopsys, Inc. announced disruptive innovations in emulation delivering 10 MHz performance to speed hardware and software verification of complex system-on-chips (SoCs) in areas such as high-performance computing (HPC), 5G, GPU, artificial intelligence (AI) and automotive. The new ZeBu® EP1 emulation system leverages Synopsys’ proven direct-connect architecture to optimize design communication and deliver unprecedented emulation performance. In addition, the unique power-aware emulation, system-level debug, hybrid emulation and virtual host and device capabilities in ZeBu accelerate SoC product readiness across both hardware and software domains. Synopsys ZeBu EP1 is available now.

“We continue to accelerate innovation for our verification hardware by collaborating with industry-leading customers,” said Manoj Gandhi, general manager of the Verification Group at Synopsys. “ZeBu EP1 represents the convergence of multiple hardware and software technologies to deliver breakthrough performance and debug. The unique fast emulation capability in ZeBu is enabling electronics companies to develop and verify the most advanced SoCs with full software stacks.”

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To keep up with its customer’s growing SoC size, rising software complexity, stringent power requirements and increased chip-to-chip and external communication requirements, Synopsys relentlessly innovates in emulation to deliver breakthrough performance, industry-leading hardware-software power verification, unique system-level debug capabilities, comprehensive hybrid emulation solutions and the widest range of virtual interfaces. As electronics companies have been investing in fast emulation and prototyping farms to accelerate software-bring up, SoC verification and system validation, Synopsys verification hardware has emerged as the industry market leader. Synopsys’ latest generation emulation and prototyping systems incorporate the Xilinx Virtex UltraScale+ VU19P device. The collaboration between Synopsys and Xilinx drives continued innovation on FPGA compile, runtime performance and at-speed debug.

As part of Synopsys Verification Continuum® Platform, ZeBu is the industry’s highest-performance, highest-throughput emulation platform and supports a comprehensive range of use cases.  Recent ZeBu innovations include:

  • ZeBu EP1, the industry’s first 10 MHz emulation system, utilizing Synopsys’ proven direct-connect architecture, optimizes design communication to accelerate hardware and software verification for SoC designs of up to 2 billion gates.
  • ZeBu Empower emulation system, the industry’s first SoC power-aware emulation system, enabling multiple iterations per day with actionable power profiling in the context of the full design and its software workload.
  • ZeBu System Level Debug, the proven approach to efficiently debug complex SoC with billion-cycle software workloads, leveraging high-bandwidth host interface for continuous data streaming and deterministic replay for eliminating redundant emulation runs.
  • ZeBu Hybrid Emulation with Virtualizer® virtual prototyping, supported by an extensive library of virtual processor, memory and interface models, delivers 70-100x throughput gain for OS boot enabling more complex software validation and earlier tape-out.
  • ZeBu Virtual Host and Device models for PCIe 5.0, USB3, SATA, Ethernet, and NVMe enable validation of host to device software stack with real OS, driver, and application software of complex SoCs.
  • ZeBu Simulation Acceleration technology with unified testbench and design compile, and speed optimized protocol transactors provides 100x speed up for simulation for faster RTL regression performance and environment bring up.
  • ZeBu Speed Adapters connect ZeBu emulation systems to real-world environments for in-circuit emulation (ICE) use cases. Based on proven Synopsys DesignWare® IP, they support PCIe, CXL 2.0, Ethernet, USB, SATA, Display port as well as 5G testers, networking testers and customer specific hardware.

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“Computing innovation is happening at a rapid pace across the Arm partner ecosystem,” said Tran Nguyen, senior director of design services, Arm. “As more software-intensive Arm-based HPC, 5G, GPU, AI and automotive applications are developed, there is an increasing demand for faster emulation and accelerated verification, and we continue to work closely with Synopsys to address that need for our mutual customers.”

“Xilinx and Synopsys’ deep technical collaboration over many years has accelerated broad industry adoption of and innovation around FPGA-based emulation and prototyping,” said Vamsi Boppana, senior vice president, Central Products Group at Xilinx. “With the growing complexity of SoC designs and software, we look forward to continuing our close work with Synopsys to advance a strong technology pipeline for FPGA compile, runtime performance and at-speed debug.”

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