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Cervoz Announces New DDR5 Industrial Grade Modules

Cervoz Announces New DDR5 Industrial Grade Modules
Effectively increase memory bandwidth and improve performance to meet the needs of intensive computing applications.

Cervoz Technology Co., Ltd (“Cervoz”), a global storage and memory solution provider, announces the introduction of new industrial-grade DIMM, SO-DIMM DDR5 memory modules that feature enhanced capacity, stability, and power efficiency for high-bandwidth industrial applications such as such as data centers, AIoT, and machine learning.

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Higher Efficiency: One DIMM, Two Channels (2x Bandwidth)

The new DIMM channel architecture is updated with two independent 40-bit (32 data bits with eight ECC bits) subchannels per memory module (DIMM). With this new architecture, Cervoz DDR5 will significantly increase memory access efficiency and lower the latencies of data accesses for the memory controller.

Going Bigger: Higher Capacity (4x Capacity)

Besides increased memory bandwidth, DDR5 will allow for individual memory chips up to 64Gbit in density, which is 4 time higher than DDR4’s 16Gbit density maximum, enabling higher-capacity DIMMS.

Going Faster: Greater Starting Speed performance (2x Speed)

DDR5 debuts at 4800MT/s, while DDR4 tops out at 3200MT/s, a 50% increase in bandwidth. In cadence with compute platform releases, DDR5 has planned performance increases that will scale to 6400MT/s, ideal for edge computing, IoT, 5G, surveillance, and industrial PC-related applications.

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New Power Architecture for Greater Efficiency

Cervoz DDR5 is fifty percent faster than DDR4 to boost high-speed computing, while its low power consumption and increased efficiency keep your system cool at 1.1V. The on-DIMM power management IC (PMIC) allows for better power efficiency. It also has a significant advantage for enterprise servers working around the clock.

On-Die ECC for Greater Stability and Reliability

With on-die ECC (Error Correction Code), the DDR5 modules keep the system stable by self-correcting errors, effectively improving transmission reliability. ECC-enabled processors for servers and workstations feature the coding to correct single or multi-bit errors.

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