– First eFPGA IP generated by Australis IP Generator for TSMC process
– Enabled quick retargeting to TSMC 22nm process needed for customer’s SoC
– eFPGA Supported by Open-Source as well as QuickLogic Aurora FPGA User Tools
QuickLogic Corporation a developer of ultra-low power multi-core voice-enabled SoCs, embedded FPGA IP, and Endpoint AI solutions, today announced the availability of its first customer-defined eFPGA block targeting TSMC’s 22nm process node. The IP was generated by the Australis IP Generator tool which enabled rapid eFPGA IP generation and can target nearly any foundry/process node combination in a few weeks to a few months.
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Now that this eFPGA IP core is available, future customizations can be completed in a matter of weeks. It can easily be modified and integrated into other customer’s SoC devices. Once integrated, the cores are supported by QuickLogic’s own Aurora FPGA User Tools as well as 100% open-source tool flows.
SoC developers integrating embedded FPGA IP gain a host of post-production benefits from its inherent flexibility. For example, it enables a single SoC to serve multiple adjacent applications, address competitive challenges with new features, or adapt to evolving standards. As a result, the effective market life of complex SoCs is extended and the high investment in time and money required to create them can be amortized over a longer product l******* – increasing profitability and ROI.
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“When we first created the Australis eFPGA IP generator, we knew it had the capability to quickly and easily target almost any foundry and process,” said Mao Wang, QuickLogic’s senior director of product management. “Now we are seeing the proof of its capabilities in the form of actual customer implementations, first for UMC and now for TSMC.”
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