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VORAGO Technologies Announces 4-Channel Rad-Hard Latch-up Monitor IC Solution, Now Sampling

VORAGO Technologies Announces 4-Channel Rad-Hard Latch-up Monitor IC Solution, Now Sampling
VORAGO Technologies continues to push innovation boundaries with this small-footprint, single-chip, multi-channel latch-up monitoring solution with unmatched radiation performance of up to 200 krad (Si) TID. This product is the ideal solution for protection of sensitive semiconductor devices exposed to extreme environments.

VORAGO Technologies  announced the first product in a new line of radiation-hardened protective devices, the VC91200, a superior latch-up monitor IC. Sample evaluation kits are now available for purchase.

“Latch-up due to the effects of radiation can result in catastrophic failure of devices in extreme environments. The ability to detect and prevent latch-up before it occurs is critical to the success and longevity of missions in space. We are proud to offer a fully integrated multi-channel latch-up solution that allows our customers to monitor and protect up to four devices at once.”

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Dr. Hannah Moore, Sr. Manager, Product Management, VORAGO Technologies

Designed with VORAGO Technologies’ patented HARDSIL® Technology, the VC91200 was created as the ultimate space-grade protection device including rad-hardened registers with Triple Mode Redundancy (TMR) and Dual-Interlocked Storage Cells (DICE) on key register elements, with the ability to protect up to four devices at once with a single chip.

VORAGO’s VC91200 includes the following features and benefits:

  • Latch-up current sensing of up to 4 devices
  • Over-voltage detection
  • Load-dump control
  • Extensive configuration setting options via GPIO, UART, I2C
  • Digital timer watchdog functionality
    • Configurable for individual channels or universal shutdown
    • Configurable timeout period
  • Load supply range 12V
  • Power supplies 3.3V only or 3.3V/1.5V
  • Radiation-hardened with HARDSIL® up to 200 krad (Si) TID
  • Single-event Latch-up (SEL) immunity for all ion LETs <= 110 MEVcm2 (at 125°C)
  • Soft Error Rate (SER) EDAC enabled: <1e-15 errors / bit-day
  • Easy-to-design development kit, with exceptional support and service offerings available

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