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Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC

Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC

Companies to cooperate on leading technologies in HPC and RISC-V design to enable the next generation of supercomputers

Esperanto Technologies, a leading developer of RISC-V chips and software for high-performance computing (HPC) and artificial intelligence (AI), today announced that they are cooperating with NEC Corporation on the roadmap for next-generation chips and software for HPC computing. The goal of the cooperation is to facilitate the further development of hardware and software solutions to enable the next generation of supercomputers based on the RISC-V instruction set. The cooperation is expected to leverage NEC’s deep experience and expertise in HPC supercomputer design and development of HPC software stacks along with Esperanto’s technology and expertise in high-performance energy-efficient multiprocessor chips based on the RISC-V instruction set.

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“We are looking forward to starting this strategic collaboration with NEC which will help advance supercomputing solutions by improving performance per watt while helping Esperanto to realize chip-level solutions for combined AI plus HPC workloads.”

NEC Corporation has a long and influential history in supercomputing and HPC, providing systems that meets customer needs by integrating its CPU, GPU and vector solutions. What makes the company unique is their vector processor, which has been developed over decades. NEC’s expertise in vector architecture distinguished its machines in fields requiring large-scale numerical computation, such as weather forecasting and scientific research. In recent years, NEC has been active in integrating AI and machine learning capabilities into its supercomputing solutions, expanding its role in diverse areas from scientific research to industrial applications.

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Esperanto Technologies develops high-performance processors and software for both HPC and AI applications. Compatible with the free and open RISC-V instruction set architecture, Esperanto’s chips deliver high performance per watt. Esperanto’s first product, the ET-SoC-1, packs over one thousand RISC-V cores on a single chip, providing high throughput for AI inference workloads while keeping power consumption low – typically under 30 watts – a critical advantage for data centers and edge computing. Next-generation products under development will add features for HPC and a broader set of AI applications. Esperanto’s expertise lies in designing scalable, energy-efficient and massively parallel architectures optimized for HPC and AI. As a founder of RISC-V International, Esperanto has played a significant role in the growing RISC-V ecosystem.

“By leveraging NEC’s deep experience and expertise in HPC, and harnessing the free and open, industry-standard RISC-V instruction set combined with Esperanto’s energy-efficient compute technology, we’re able to develop scalable, efficient AI plus HPC solutions that are both high-performance and energy-efficient,” said Art Swift, president and CEO of Esperanto Technologies. “We are looking forward to starting this strategic collaboration with NEC which will help advance supercomputing solutions by improving performance per watt while helping Esperanto to realize chip-level solutions for combined AI plus HPC workloads.”

“Migrating supercomputing to a more energy-efficient solution compatible with the RISC-V architecture presents a transformative opportunity for data centers worldwide. By reducing energy consumption without sacrificing performance, we can not only lower operating costs but also significantly reduce greenhouse gas emissions—key to building a more sustainable computing ecosystem,” said Masaki Kondo, senior director, HPC Department at NEC Corporation. “We are looking forward to the collaboration with Esperanto which aligns with our vision for supporting the RISC-V ecosystem in both chips and software to meet the growing demands of high-performance computing while reducing data center power demands.”

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