Successful silicon bring-up extends leadership in chiplet-enabled silicon solutions to accelerate AI connectivity and compute
Alphawave Semi , a global leader in high-speed connectivity and compute solutions for the world’s technology infrastructure, announced the successful bring-up of its first chiplet-connectivity silicon platform on TSMC’s most advanced 3nm process. This new silicon-proven Universal Chiplet Interconnect Express (UCIeTM) subsystem expands Alphawave Semi’s portfolio and leadership in connectivity silicon. It paves the way for a robust, open chiplet ecosystem that accelerates connectivity and compute for high-performance AI systems. An industry-first live demo of Alphawave Semi’s 24Gbps UCIe silicon platform on the TSMC 3nm process was recently unveiled at the Chiplet Summit in Santa Clara, CA.
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“We are thankful to our TSMC team for their outstanding support, and we look forward to accelerating our mutual customers’ high-performance chiplet-based designs on TSMC’s leading-edge 3nm process.”
Alphawave Semi’s 3nm UCIe complete PHY + Controller subsystem is capable of 24Gbps data rates, delivering high bandwidth density at extremely low power and low latency. The solution is compliant with the latest UCIe Revision 1.1 Specification and includes a highly configurable Die-to-Die D2D controller that supports streaming, PCIe/CXLTM, AXI-4, AXI-S, CXS, and CHI protocols. The subsystem features Bit Error Rate (BER) Health Monitoring to ensure reliable operation. The PHY can be configured to support TSMC’s advanced packaging technologies such as Chip-on-Wafer-on-Substrate (CoWoS) and Integrated Fan-Out (InFO) which maximize signal densities, as well as organic substrates for a more cost-effective solution.
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“We’re pleased with the results of our latest collaboration with Alphawave Semi in the delivery of a silicon-proven chiplet-connectivity solution on TSMC’s 3nm process,” said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC. “We will continue to work with our Open Innovation Platform (OIP) partners like Alphawave Semi to help foster a robust and open chiplet ecosystem for high-performance connectivity and compute silicon solutions to enable more AI applications.”
“Achieving 3nm silicon-proven status for our 24Gbps UCIe subsystem is a key milestone for Alphawave Semi, as it is an essential piece of our chiplet connectivity platform tailored for hyperscaler and data-infrastructure applications,” said Letizia Giuliana, VP IP Product Marketing at Alphawave Semi. “We are thankful to our TSMC team for their outstanding support, and we look forward to accelerating our mutual customers’ high-performance chiplet-based designs on TSMC’s leading-edge 3nm process.”
Customers can benefit from Alphawave Semi’s application-optimized IP subsystems and advanced 2.5D/3D packaging expertise through the integration of advanced interfaces such as UCIe, PCIe, CXL, Multi-Standard-Serdes, and HBM onto custom chips and chiplets.
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