Xilinx UltraScale+™ FPGA enables easy prototyping platform deployment with the add-on PCI Express GT card
Corigine announced sample availability of its MimicTurbo GT card based on the Xilinx UltraScale+ VU19P FPGA. The card along with the Corigine MimicTurbo prototyping software solution simplifies the deployment of FPGA based prototyping at the desktop, thus greatly accelerating silicon verification and pre-silicon software development at semiconductor companies.
“The simplicity with which the MimicTurbo GT cards can be deployed hastens software and silicon development and verification,” said Corigine CEO Sheng Lu, “The MimicTurbo GT card extends the growing Corigine EDA family that is designed to bridge the gap between software and hardware verification tools, without breaking the bank,” he added.
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The Corigine MimicTurbo GT offers automated FPGA partitioning and interconnect while leveraging the high-speed Xilinx GT (GigaHertz Transceiver) I/O connection between multiple FPGAs. “The Xilinx FPGAs make it possible for Corigine to deliver multi-gigabits per second performance with its MimicTurbo GT prototyping cards while offering the deployment simplicity of a standard PCI Express platform,” said Chris Stinson, senior director of Test, Measurement and Emulation Markets at Xilinx. “By innovatively utilizing the high-speed GT I/O of the Xilinx UltraScale+ FPGAs, the MimicTurbo GT cards fully demonstrate the amazing flexibility and ease of cable free interconnect of multiple VU19P FPGAs.”
The Corigine MimicTurbo GT card can be deployed in a 16-lane PCI Express slot and supports 64 GTY transceivers (16 Quads) along with the essential I/O interfaces and includes FMC and FMC+ connectors. The Corigine MimicTurbo GT cards support up to 48 million ASIC gates each and can be configured to operate with additional connected MimicTurbo GT cards. Bundled with the MimicTurbo software, the solution delivers the best-in-class automated partitioning for larger System-on-Chip designs. The MimicTurbo software leverages the Xilinx VU19P HSTPM IP for extraordinarily low latency with I/O pin-muxing across transceivers, delivering an ingeniously high-performance partitioning implementation.
The Corigine EDA tools have been architected to address the needs of the coming generations of SOCs for AI, Automotive, Communication, Processing, Vision, and upcoming applications in silicon. The Corigine MimicTurbo GT solution is designed for deployment in the enterprise as well as over the cloud.
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