Tektronix, Inc., a leading worldwide provider of test and measurement solutions, released KTE V7.1 software for the Keithley S530 Series Parametric Test System to help accelerate semiconductor chip manufacturing just when the world market needs it most
New options made available for the first time with the KTE V7.1 release include a new parallel test capability and a unique high-voltage capacitance test option for emerging power and wide bandgap applications. KTE V7.1 improves test times more than 10 percent versus KTE V5.8, which means engineers can reduce downtime and make chips faster.
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The emergence of 5G and growth of IoT has fueled global demand for semiconductors. Global shortages not only call for increased manufacturing but faster ability to test new chips being developed. Tektronix’s release of this new testing system can help speed up manufacturing by decreasing test time and thus accelerating delivery of new chips to market.
“Today’s emerging analog, wide bandgap (SiC and GaN), and power semiconductor technologies require parametric testing that maximizes measurement performance, addresses a wide product mix, and minimizes cost,” says Peter Griffiths, general manager, Systems & Software at Tektronix. “Our customers, including the worlds’ largest chip manufacturers, will enjoy the enhancements of KTE V7.1 that will enable engineers to continue to design innovations at unprecedented pace to meet demands of the changing markets.”
The release of KTE V7.1 builds upon the improvements in functionality and throughput being made to the S530 system since the release of KTE 7.0. The new testhead design allows flexibility in use of varying probe cards. The upgraded software and hardware enables single-pass testing and high throughput. When it comes to service, the recently released System Reference Unit (SRU) shortens the calibration time to less than eight hours, meaning they can be completed in one regular working shift. The SRUs can be purchased directly or with an annual SSO service plan.
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Significant Enhancements and Industry Firsts
Parallel Test Capability Further Improves Productivity and Lowers the Cost of Testing
Made available for the first time as an option on the KTE V7.1 release, the S530 now features a powerful parallel test option that further improves productivity and lowers testing costs with an anticipated 30 percent improvement range (depending on tests and structures). Built on the S530’s unique hardware architecture that enables up to eight high-resolution SMUs to connect to any test pin through any fully Kelvin port/row in the system, Keithley’s parallel test software optimizes the efficiency of all system resources to maximize test throughput.
Unique High-voltage Capacitance Test Capabilities for Emerging Power and Wide Bandgap Applications
Today’s engineers need to test high-voltage devices. There is a growing demand for chips with faster switching speeds and more efficient switching. Greater efficiency not only reduces power use and heat, it is also better for our environment. To test these wide bandgap devices at their higher operating voltages, engineers are moving from the R&D lab into fabrication. With the release of KTE V7.1, the High Voltage Capacitance Voltage (HVCV) special option is a unique offering in combination with the industry’s only single-pass testing solution that can measure between 200 and 1000 volts, providing the ability to test capacitance up to 1100 V DC bias. This production-ready capability enables precision measurement of Cdg, Cgs, and Cds to support characterization and test of a power device’s input and output transient performance.
Test Up to 1100 V on Any Pin with a Single Probe Touchdown
In addition to sourcing and measuring up to 1100 V, up to two 2470 SMUs can be configured in a S530-HV system, and the high voltage switch matrix inside the S530-HV enables the user to perform these measurements on any test pin at any time. This provides maximum flexibility to meet the pin-out requirements of a wide mix of test devices and structures, while eliminating the throughput delays and higher costs associated with two-pass testing or dedicated pin approaches.
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