Samsung Foundry achieves fast and accurate verification of its 3nm, 4nm and 5nm designs using the Cadence Spectre FX FastSPICE Simulator
Cadence Design Systems, announced that Samsung Foundry has deployed the Cadence Spectre FX Simulator for FastSPICE-based verification of their large-scale analog and mixed-signal IP on 3nm, 4nm and 5nm processes. Using the Spectre FX simulator, Samsung Foundry has achieved up to 2X productivity gains and improved accuracy while accelerating time to market.
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“Our large-scale analog IP, including high-speed PLLs, transceivers and SRAM designs, need very high simulation accuracy to meet demanding end-user specifications”
The design and verification of Samsung Foundry’s analog and mixed-signal IP can be challenging due to the stringent design specifications and increased complexity needed to meet end-customer demands. For example, Samsung Foundry needed to find a way to address evolving architectures, higher clock speeds, increasing design sizes due to advanced-node processes and the exponential increase in layout parasitics. Samsung Foundry successfully used Cadence’s Spectre FX FastSPICE simulator to address these needs, verifying PLL, SRAM and PCI Express (PCIe) designs on the latest Samsung process nodes with fast performance and optimal accuracy. They also leveraged the simulator to check critical measurements, such as PLL output average and peak-to-peak frequencies, SRAM timing checks and PCIe transceiver output data signal, to ensure that the designs meet their functionality, timing and power specifications.
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Samsung Foundry also leveraged the Spectre FX Simulator’s highly scalable multicore architecture to parallelize their transient simulations. This allowed its design and verification teams to improve simulation turnaround time by utilizing the available hardware resources without trading off accuracy. Additionally, the simulator offered excellent accuracy and performance out of the box, providing a simple preset use model with minimal simulation-tuning requirements to accelerate specific verification tasks and improve designer productivity.
“Our large-scale analog IP, including high-speed PLLs, transceivers and SRAM designs, need very high simulation accuracy to meet demanding end-user specifications,” said Sangyun Kim, corporate vice president of Foundry Design Technology Team at Samsung Electronics. “We also need these simulations to run fast enough to finish within our short verification cycles without sacrificing the verification quality. As a result of our collaboration with Cadence, the Spectre FX FastSPICE Simulator delivers optimal performance and up to 2X productivity improvement on our 3nm, 4nm and 5nm IP while providing optimal accuracy. Therefore, we’ve deployed the solution in our production flows.”
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