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Samsung Foundry Certifies Synopsys PrimeLib Unified Library Characterization and Validation Solution at 5nm, 4nm and 3nm Process Nodes

Samsung Foundry Certifies Synopsys PrimeLib Unified Library Characterization and Validation Solution at 5nm, 4nm and 3nm Process Nodes
Mutual Customers Gain Up to 5x Reduced Turnaround Time and Golden Signoff-Quality Libraries for Automotive, AI Chipset, Aerospace and Defense, HPC and 5G Markets

Synopsys, Inc. announced that Samsung Foundry certified the Synopsys PrimeLib™ unified library characterization and validation solution at 5-nanometer (nm), 4nm and 3nm process technologies, meeting advanced compute demands for next-generation designs spanning high-performance computing (HPC), 5G, automotive, hyper-connectivity and aerospace and defense applications, as well as artificial intelligence (AI) chipsets. The certification includes accreditation of PrimeSim™ Continuum, a foundation of the Synopsys Custom Design Platform and integrated simulator technology embedded within the PrimeLib solution, delivering a seamless simulation experience to achieve golden-signoff quality.

With compute demands growing 3x as each node advances, library characterization complexity has dramatically increased. As key features of the PrimeLib solution, advanced machine-learning (ML) algorithms and an adaptive flow generate accurate statistical variation models at ultra-low voltage corners up to 5x faster than previous generations, while reducing overall compute cost. The next-generation solution also includes innovative SmartScaling technology for multi-PVT characterization, built on top of the Synopsys PrimeTime® scaling engine to enable instant library generation with minimum characterized corners.

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“We are committed to providing our customers with the most innovative technology solutions to address the challenges of growing design and modeling complexity at 5nm and below,” said Sangyun Kim, VP at Samsung Foundry. “The Synopsys PrimeLib library characterization and validation solution enables us to deliver signoff-quality libraries for these advanced nodes up to 5x faster. This enables our mutual customers to accelerate the overall chip design schedule and tape out achieving optimal power, performance and area goals.”

To keep up with growing market needs for optimized chip performance, high-quality libraries at advanced process nodes and cloud readiness for system design, accuracy requirements at 5nm down to 3nm need effective library characterization cycles of advanced models like electro-migration (EM), aging and liberty variation format (LVF). Additional global variation to target next-generation applications result in changes in process, voltage and temperature (PVT) that significantly impact chip design. Ultimately, these changes lead to increased compute strains that require extensive support during peak demand requirements of process design kit (PDK) change, adversely affecting the delivery time for designs.

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PrimeLib library characterization supports advanced models like moment-based LVF, aging and EM, offers captive simulator license support for characterization and superior scalability to existing solutions by delivering up to 5x faster turnaround time (TAT) beyond 100,000 parallel jobs on the cloud or a compute cluster. The PrimeLib solution leverages embedded PrimeSim SPICE and HSPICE engines, integrated with validation capabilities to produce PrimeTime golden signoff-quality libraries and PrimeShield® design robustness analysis.

Key product features and customer benefits include:

  • Advanced ML models with up to 5x LVF performance improvements to accurately account for effects in ultra-low PVT corners. Cloud-ready support with superior scaling technology to reliably handle any workload while reducing TAT from weeks to days.
  • SmartScaling technology for multi-PVT corners to lower characterization runtime by 3x to 10x and enable instant library generation.
  • Embedded PrimeSim SPICE engine and signoff validation capabilities to produce PrimeTime golden signoff-quality libraries, correlation, constraint and power validation.
  • ML-based augmented sensitivity database to enable faster time-to-market for an updated PDK.

”Successful IC design requires high-quality libraries, and Synopsys PrimeLib provides a comprehensive set of capabilities that allows customers to confidently scale with evolving industry demands,” said Sanjay Bali, vice president of Product Marketing, Digital Design Group at Synopsys. “We value our continued collaboration with Samsung Foundry to support delivery of best-in-class process technologies and believe this certification is a testament to our continued efforts in innovation, accelerating high-performance designs for our mutual customers.”

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