proteanTecs Launches Power Reduction Solution for High Performance Markets

Proven during production and l******* operation, customers can now optimize power and performance without the risk

proteanTecs, a global leader of deep data analytics for advanced electronics, announced the launch of its power reduction solution for the datacenter, mobile, communications and automotive markets. Now available, the proteanTecs’ power reduction solution uses on-chip telemetry, machine learning and predictive analytics to enable workload-aware system-on-chip (SoC) power reduction during production testing and in-field operations.

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“As CPUs, GPUs and AI processors advance and must support increasing performance demands, the need for power reduction has intensified in reliability-critical markets, such as cloud computing, mobile, telecommunications and automotive”

Based on personalized device assessment and the real-time visibility of actual timing margins under functional workloads, the new solution highlights unique offerings—from Power Characterization and inline-testing VDDmin Prediction to the industry first-and-only real time AVS Pro™ application. These capabilities can be used independently or concurrently to maximize power savings by over 10% with a protection layer. To schedule a demo, c*********.

“As CPUs, GPUs and AI processors advance and must support increasing performance demands, the need for power reduction has intensified in reliability-critical markets, such as cloud computing, mobile, telecommunications and automotive,” said Evelyn Landman, co-founder and CTO of proteanTecs. “We’ve successfully proven the proteanTecs power reduction solution with multiple customers, and we’re eager to help more customers balance their tradeoffs, reduce guard bands in a safe way, and optimize power and performance without the risk of system failure. Customers can now double down on their power savings with a safety net.”

For significant in-field power savings, proteanTecs introduces AVS Pro, a closed-loop hardware-firmware application for reliability and functional-workload aware adaptive voltage scaling (AVS). Based on timing margin agents, AVS Pro leverages excessive guard-bands to reduce power while guaranteeing failure prevention. This silicon-proven technology has enabled customers to reduce their power consumption by an average of 8-14%.

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For power reduction during production, proteanTecs offers applications for prediction-based VDDmin optimization per individual chip and system, with deep data analytics for process grading. These applications are deployed on the tester with advanced analysis on the proteanTecs cloud platform. Partnering with leading automated test equipment (ATE) vendors, the company enables parametric power and performance visibility for inline decision making.

proteanTecs’ power reduction solution offers several key advantages to performance- and reliability-critical markets, including cloud computing, consumer devices, telecommunications and automotive. By optimizing power-hungry components, customers can improve operational efficiencies and prolong the l******* of their system’s electronics, leading to significant cost savings, and higher system utilization rates.