Alphawave Semi, a global leader in high-speed connectivity for the world’s technology infrastructure, announced the expansion of its ongoing collaboration with Samsung to include the 3nm process node. Samsung Foundry platform customers now benefit from Alphawave Semi’s most advanced high performance connectivity IP and chiplet technologies, including 112 Gigabits-per-second (Gbps) Ethernet and PCI Express Gen6/CXL 3.0, interfaces to build the complex systems-on-a-chip (SoCs) needed to keep pace with the rapidly growing demands of data-intensive applications such as generative AI and the associated infrastructure required by global data centers.
“Alphawave Semi is a key partner for Samsung Foundry, as they are the established industry leaders in high performance connectivity IP and chiplet solutions,” said Jongshin Shin, Corporate EVP of Foundry IP development at Samsung Electronics. “We are very pleased to be deeply collaborating with Alphawave Semi over multiple customer designs and process generations, including 5nm and 4nm, and now 3nm. We look forward to many more opportunities to leverage Alphawave Semi’s connectivity IP in the Samsung Foundry platform in 2023 and beyond.”
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“Data center connectivity is undergoing a remarkable transformation due to the rise of generative AI, ushering in an era of high performance chiplet-enabled silicon. Besides enabling the AI infrastructure, Alphawave Semi technology also enables connectivity in the data centers that house AI solutions,” said Tony Pialis, CEO, and co-founder of Alphawave Semi. “We are pleased to expand our deep collaboration with Samsung Foundry to the 3nm node, leveraging our most advanced high-speed connectivity IP technologies that provide new levels of performance, flexibility, and scalability to hyperscalars and data-infrastructure customers.”
Alphawave Semi’s high-performance connectivity PHY IP including 112 Gbps Ethernet and PCIe Gen6/CXL3.0, and Universal Chiplet Express (UCIe) are available in the Samsung Foundry nodes. Alphawave Semi also offers them as fully integrated IP subsystems together with controller IP.
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