Debugging Software and Methodology Enables Ultra-Low Power and Faster Time-to-Market
Diakopto announced that Everactive, a technology company that sells category-defining batteryless, wireless Internet of Things (IoT) solutions, has selected ParagonX™ to accelerate and optimize the development of their ultra-low power wireless sensors.
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Founded on ground-breaking ultra-low power circuit technology, Everactive develops wireless sensors that require minuscule amounts of power to sense, process and wirelessly transmit data continuously – all from energy harvesting. This self-powered batteryless technology is unlocking a new age of scalable industrial IoT and remote asset monitoring.
“To achieve the absolute lowest power in our wireless IoT solutions, we need to squeeze every ounce of performance and power efficiency out of our designs,” said Dr. Alice Wang, Head of Edge Platform Architecture at Everactive. “ParagonX is an important enabler of our design methodology by giving our engineers the deep insights required to fully optimize our designs and overcome the numerous challenges caused by layout parasitics. Instead of treating parasitics as a black-box, ParagonX is shining light into the problem to allow us to truly understand what is going on, and to fix problems at their root cause.”
Parasitics are unintended elements in integrated circuit (IC) designs that degrade a circuit’s performance, precision, power efficiency, robustness, and reliability. The ever-increasing need for higher density, faster speed, and greater precision, coupled with continued migration to more advanced technology nodes have redefined the role of parasitics in IC design. The power-performance-area (PPA) metric and time-to-market of modern ICs are now dominated by on-chip interconnects and layout parasitics. Debugging these design problems – and addressing the underlying issues causing them – has become extraordinarily difficult, tedious, and time-consuming.
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ParagonX offers a new methodology that delivers insights to help Everactive engineers quickly and easily pinpoint bottlenecks and the sources of IC design problems caused by parasitics. It is orders of magnitude faster than other EDA solutions, and helps engineers quickly find the few critical parasitic elements (out of thousands, millions, or billions) responsible for bottlenecks, choke points and weak areas. This enables Everactive to more quickly improve their IoT solutions.
“We are very excited to welcome Everactive to our rapidly growing family of ParagonX users,” commented Dr. Maxim Ershov, CEO and CTO of Diakopto. “Layout parasitics are affecting every aspect of IC design, including in pre-FinFET nodes, as demonstrated by numerous companies like Everactive adopting ParagonX to push the envelope on performance, precision and power in these more mature process technologies.”
ParagonX offers superior ease-of-use and a unique out-of-the-box experience that enables novice users to get started with minimal training. The tool does not require complicated setup, configuration, CAD support, or foundry qualification. This highly intuitive and versatile methodology enables rapid adoption by new users and design teams. In addition, it improves the collaboration between IC design and layout engineers by providing a platform on which they can jointly analyze, visualize, debug and optimize parasitics-related issues.
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